Inside a Multi-$Billion IP Engine Driving IC and EDA Innovations

Moore's Lobby · 22 Sept 2026 · 55m · Episode 7

What this episode covers

John Koeter, Senior Vice President of IP at Synopsys, discusses the evolution of semiconductor intellectual property, the shift to multi-die chiplet architectures, and the transformative role of AI in chip design. He details Synopsys' acquisition of Ansys to enhance thermal modeling for 3D ICs, the challenges of managing heat in stacked dies, and the critical importance of software ecosystems for emerging architectures like RISC-V. Koeter also offers career advice on adaptability and leveraging AI as a force multiplier for engineers.

Mentioned

Companies
Synopsys, Ansys, Intel Foundry, Texas Instruments, Nokia, AMD, Samsung, GlobalFoundries, Apple, Tesla
Products
PCI Express, USB, HDMI, Ethernet
Chips
RISC-V, ARM, x86

Other shows on the same ground, closest first.

  • EE Times Current · 24m

    Transforming Compute Possibilities with Multi-Die Systems

    Shekhar Kapoor, Senior Director of Product Line Management at Synopsys, explains the industry's shift from monolithic SoCs to multi-die systems, driven by the limits of Moore's Law and the demand for high-performance computing. He details how technologies like 3D stacking, fan-out wafer scale, and the UCIE standard enable modular, heterogeneous integration for products like the Apple iPhone 15 camera and Tesla's Autopilot. Kapoor highlights Synopsys' role in providing the TDC compiler and comprehensive IP portfolios to facilitate this transition, noting over 100 active multi-die designs currently in development across AI, automotive, and data center markets.

  • EE Times Current · 20m

    The State of Multi-Die: Insights and Customer Requirements

    Shaker Kapur, Executive Director of Productline Management for the Synopsys EDA Group, discusses the industry shift toward multi-die design driven by the strategic collaboration between OpenAI and AMD. He explains how this partnership, involving up to 6 gigawatts of AMD Instinct GPUs, highlights the necessity of co-optimizing hardware and software to meet exploding AI compute demands. Kapur details how Synopsys addresses these challenges through its 3DIC Capital platform, which unifies multi-die architecture exploration and system-level analysis to enable scalable, power-efficient data center architectures.

  • The Circuit · 42m

    Episode 67: A Conversation with Aart de Geus on EDA and the Future of Silicon Design

    Aart de Geus, co-founder and executive chair of Synopsys, discusses the evolution of electronic design automation (EDA) and the future of silicon design. He explains how the industry shifted from analog to digital design, enabling the automation that drove Moore's Law, and details the transition to the Angstrom era with technologies like FinFETs and backside power delivery. De Geus also highlights the rise of systemic complexity through chiplets and vertical stacking, and the critical role of AI in optimizing these complex multi-die architectures.

  • EE Times Current · 40m

    An All Inclusive Journey to HPC/Data Center Silicon Success

    Charlie Matar, Senior Vice President of Systems Solutions at Synopsys, discusses the escalating complexity of High Performance Computing (HPC) and data center silicon design. He highlights critical challenges including engineer shortages, the high cost of advanced nodes, and the shift toward chiplet architectures and 2.5D/3D packaging. Matar also explains how Synopsys is leveraging its DSO.AI platform to optimize power, performance, and area (PPA) while addressing reliability and security concerns in the semiconductor ecosystem.

  • EE Times Current · 28m

    Automated Multiphysics for 3D IC Success

    Chevanoki and John Ferguson from Siemens EDA discuss the challenges of automated multiphysics analysis for 3D IC design, specifically how power, heat, and stress interact in stacked heterogeneous architectures. They explain the shift from traditional 2D verification to integrated flows that account for GDS-level details, thermal impacts, and mechanical stresses to ensure timing closure and reliability. The guests highlight the importance of standards like 3D-BC, the use of Siemens' Calibre and Flowtherm tools, and the future role of AI in reducing the steep learning curve for designers moving into 3D stacking.

The summary, chapters and topics are generated from the episode’s audio by this directory, not written by Moore's Lobby. The episode itself belongs to its publisher.