EP 146: The State of AI Networking with Austin Lyons

The Circuit · 22 Dec 2025 · 49m · Episode 148

What this episode covers

Austin Lyons, writing as Chip Strat, joins Ben Bajarin and Jay Goldberg to discuss the evolution of AI networking, defining the critical distinctions between scale-up, scale-out, and scale-across topologies. The conversation details the technical trade-offs between copper and optical interconnects, explaining how SerDes technology enables higher speeds over shorter distances and why optical is necessary for longer ranges. They highlight the strategic importance of SerDes capabilities for companies like Broadcom and Marvell, and touch on emerging trends like Celestial's photonic fabric and the acquisition of Alpha Wave by Qualcomm.

Mentioned

Companies
Netflix, AWS, Cisco, Juniper, Arista, Nvidia, Google, OpenAI, Credo, Celestial, Broadcom, Marvell, Cadence, Synopsys, Alpha Wave, Qualcomm, TSMC
Also
Chip Strat

Other shows on the same ground, closest first.

  • OnTrack · 39m

    High-Speed Interconnects for AI & Physical AI with Samtec

    Matt Burns, Director of Technical Marketing at Samtec, discusses the evolution of high-speed interconnects for AI data centers and embedded systems. He explains how connector selection has shifted from an afterthought to a critical early-stage architectural decision to support data rates of 112G, 224G, and 448G. The conversation covers specific product families like Sci-Flex LP, Accelerated HP, and Sci-Flex HD, and details the move toward co-packaged copper and optics to reduce signal loss. Burns also explores how these high-speed technologies are trickling down to 'physical AI' applications in robotics and edge computing.

  • EE Times Current · 17m

    800Gs Finally Breaking Out and Benefits of Solution

    John Swanson, HPC controller and data path product line manager at Synopsys, explains the technical breakthrough of 800G Ethernet, detailing its deployment in internet backbones and high-performance data centers. He discusses how industry standards from the IEEE and Ethernet Consortium are enabling interoperability, allowing generic switches and network interface cards to work together reliably. Swanson highlights the engineering challenges of designing these chips, including the complexity of 100G PAM4 Serdes, high clock speeds, and the use of 5nm and 3nm geometries, emphasizing the need for integrated IP solutions from companies like Synopsys and Broadcom.

  • EE Times Current · 38m

    Close to the Edges: Moore’s Law & Shannon’s Limit

    Rob Shore, Senior Vice President of Marketing at Infinera, discusses how the electronics industry is approaching the physical limits of Moore’s Law (silicon integration) and Shannon’s Limit (data transmission capacity). He explains how the proliferation of data centers has shifted traffic patterns to 'east-west' interconnects, driving demand for higher capacity in long-haul and subsea networks. Shore details Infinera's role in optical networking, including the transition to coherent transmission, the use of ROADM technology, and emerging solutions like Nyquist subcarriers and XR optics to manage bandwidth more efficiently.

  • EE Times Current · 28m

    How 1.6T Ethernet will Enable the World's Fastest Datacenters

    Priyank Shukla, principal product manager for the Synopsys HPC IP portfolio, explains how Synopsys’s 1.6T Ethernet solution, featuring 224G SerDes and linear optical interfaces, addresses data bottlenecks in AI data centers. He details the convergence of digital logic (MAC/PCS) and physical layer technologies to reduce latency by 40-50% and power consumption by 50% compared to previous generations. The discussion covers the transition from 400G/800G to 1.6T, the role of the IEEE 802.3dj task force, and the Ultra Ethernet Consortium’s focus on cache coherence and tail latency for large language model training.

  • Moore's Lobby · 51m

    Can Silicon Photonics Solve the Bandwidth Bottleneck in AI Data Centers?

    Steve Klinger, VP of Product at LightMatter, explains how the company uses silicon photonics to solve the interconnect bandwidth bottleneck in AI data centers. He details LightMatter's flagship product, Passage, a programmable optical fabric that acts as an active interposer to connect chiplets and ASICs with high density and low power. Klinger also discusses Envis, LightMatter's photonic AI accelerator, which performs matrix-vector multiplication using light, and shares insights on the company's growth from MIT research to a VC-funded scaling phase.

The summary, chapters and topics are generated from the episode’s audio by this directory, not written by The Circuit. The episode itself belongs to its publisher.