How 1.6T Ethernet will Enable the World's Fastest Datacenters

EE Times Current · 20 Mar 2024 · 28m

What this episode covers

Priyank Shukla, principal product manager for the Synopsys HPC IP portfolio, explains how Synopsys’s 1.6T Ethernet solution, featuring 224G SerDes and linear optical interfaces, addresses data bottlenecks in AI data centers. He details the convergence of digital logic (MAC/PCS) and physical layer technologies to reduce latency by 40-50% and power consumption by 50% compared to previous generations. The discussion covers the transition from 400G/800G to 1.6T, the role of the IEEE 802.3dj task force, and the Ultra Ethernet Consortium’s focus on cache coherence and tail latency for large language model training.

Mentioned

Companies
Synopsys
Products
ChatGPT
Chips
224G SerDes
Also
Priyank Shukla, IEEE 802.3, PAM4, Ultra Ethernet Consortium

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