The Amp Hour · 3 Apr 2023 · 1h 07m · Episode 626
Sergiy Nesterenko, CEO of Quilter.ai, explains how his company uses generative AI and parallel cloud compute to automate PCB layout from schematics. He discusses the company's pivot from hardware sensors to software, drawing on his experience at SpaceX where manual routing became a critical path bottleneck. Nesterenko details how Quilter handles constraints, validates designs using built-in Maxwell equation solvers, and targets specific fabs like JLCPCB and Oshpark to ensure manufacturability.
Where this conversation describes AI being used to build or deliver a product. Part of the AI in practice tracker.
DesignQuilter.ailayout time reduced from 2-4 days to under 1 hour
The AI tool autonomously generated PCB layouts from schematics and constraints, completing designs in under an hour that typically required two to four engineer days.
“boards that take like two to four engineer days that we were again able to do in about an hour.”
Sergiy Nesterenko · Hear it at 14:15
DesignQuilter.ai
The system used parallel cloud compute to generate many layout variants simultaneously, increasing the probability of finding a fully completed board that passes all design rule checks.
“we do use a fairly large compute cluster to generate a lot of variants. And, you know, part of that is just to give us a higher chance of actually getting a board back that's, you know, fully completed and passing all the DRCs.”
Sergiy Nesterenko · Hear it at 15:52
Engineering & simulationQuilter.ai physics simulator
The platform includes a built-in 3D Maxwell equation solver that allows users to visualize electromagnetic fields and measure S-parameters to validate signal integrity without external tools.
“we actually have a full Maxwell equation solver built out, you know, works in three dimensions, fully general. And currently, we're going to release this pretty soon, but you can, you know, basically drag and drop a board, and then drop some kind of imaginary ports from like an imaginary vector network analyzer…”
Sergiy Nesterenko · Hear it at 29:50
ManufacturingQuilter.ai
The AI automatically compiles designs for specific manufacturers by ingesting their unique manufacturing constraints, targeting multiple fabs like JLCPCB and Oshpark simultaneously to ensure manufacturability.
“we actually do is we automatically compile for currently three fabs at the same time. So Oshpark, PCBWay and JLCPCB. And we basically take, you know, kind of the best constraints that each one of those can handle, which are a little bit different.”
Sergiy Nesterenko · Hear it at 20:48
early-stage companies
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Sergiy Nesterenko, founder and CEO of Quilter, explains how his company uses reinforcement learning and computational physics to automate PCB layout, aiming to create a 'compiler' for electronics that handles the entire design scope. He recounts his early career at SpaceX, including an internship watching paint dry and a subsequent board fire that highlighted the reliance on tribal knowledge and the failure of traditional auto-routers. Nesterenko details Quilter's workflow, which integrates with existing CAD tools like Altium to generate layouts for test boards and complex single-board computers, while acknowledging current limitations with high-voltage or ultra-dense server designs. The discussion covers the technical strategy of using neural networks to interpolate simulation results, the company's focus on iterative complexity scaling, and a 10-year vision for enabling continuous integration in hardware design.
Alain-Sam Cohen and Nabil Chouba of InstaDeep’s DeepPCB explain how their reinforcement-learning routing engine, paired with the natural-language orchestrator Cooper, detects design intent like net classes and impedance before routing. They demonstrate how the tool identifies missing context, such as unspecified reference planes and USB impedance mismatches, allowing the AI to flag and fix errors that classic autorouters miss. The guests argue that task-based AI, which focuses on specific optimization problems rather than generating entire designs from vague prompts, is the viable path for hardware automation. They also discuss how DeepPCB integrates with code-based PCB tools by acting as the placement and routing backend for schematic generation.
Duncan Haldane, co-founder and CEO of JITX, explains how his company uses a code-based design flow to automate circuit board design, targeting senior engineers to make expert knowledge reusable and scalable. He discusses the transition from his background as a Guinness world-record-holding roboticist at Berkeley to building a tool that generates schematics and layouts from functional descriptions rather than manual drafting. Haldane details JITX's evolution from a DARPA-funded research project and design consultancy to a commercial product, emphasizing the importance of baking verification checks into component models to handle supply chain volatility and design complexity.
Ioannis Papamanoglou and Narayan Powderly, co-founders of atopile, explain their code-based, AI-driven approach to PCB design, arguing that hardware has lagged behind software in tooling automation. They discuss how capturing engineering intent in code allows for deterministic design and seamless integration with tools like Altium Designer and LTspice, shifting the designer's role from boilerplate tasks to system architecture. The founders highlight the importance of connecting disconnected tools to improve supply chain resilience and firmware integration, while noting that the bottleneck for AI in hardware is orchestration rather than model capability.
Amit Gupta, Chief AI Strategy Officer at Siemens EDA, and Tim Costa, VP and GM of Industrial and Computational Engineering at NVIDIA, discuss their collaboration to build self-verifying AI agents for semiconductor and PCB design. They explain how the Fuse EDA AI agent uses NVIDIA's GPU-accelerated libraries and Nemotron models to execute long-running engineering workflows while verifying outputs against physics-based EDA engines. The speakers highlight a specific case study with NVIDIA's silicon team, where the Salido characterization suite achieved a 10x reduction in turnaround time and token costs by automating manual setup and error handling. They outline three milestones for the future: workflow coverage, verified repeatability, and integration into core engineering infrastructure, aiming to cut tape-out schedules in half.
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