Moore's Lobby · 23 Jun 2026 · 56m · Episode 4
Sergiy Nesterenko, founder and CEO of Quilter, explains how his company uses reinforcement learning and computational physics to automate PCB layout, aiming to create a 'compiler' for electronics that handles the entire design scope. He recounts his early career at SpaceX, including an internship watching paint dry and a subsequent board fire that highlighted the reliance on tribal knowledge and the failure of traditional auto-routers. Nesterenko details Quilter's workflow, which integrates with existing CAD tools like Altium to generate layouts for test boards and complex single-board computers, while acknowledging current limitations with high-voltage or ultra-dense server designs. The discussion covers the technical strategy of using neural networks to interpolate simulation results, the company's focus on iterative complexity scaling, and a 10-year vision for enabling continuous integration in hardware design.
Where this conversation describes AI being used to build or deliver a product. Part of the AI in practice tracker.
Engineering & simulationQuilterreview time from two weeks to two days
Quilter uses reinforcement learning and physics-based simulations to automatically generate PCB layouts from schematics, compressing design time from weeks to hours.
“we're routinely taking boards from these companies that take people even 2 or 3 weeks to design by hand and compressing it to, you know, a couple hours of quilt to runtime plus maybe an hour of cleanup.”
Sergiy Nesterenko · Hear it at 36:51
Engineering & simulationQuilter
Quilter's neural networks act as an interpolative database to predict simulation results for new geometries, avoiding the need to run thousands of slow electromagnetic simulations during the design process.
“what it can do then, that's special is it can interpolate between those points. So we can simulate a 1000 geometries, pick one that's somewhere between a few of them, and then use the net to kind of interpolate, right?”
Sergiy Nesterenko · Hear it at 17:42
Engineering & simulationQuilter
Quilter's 'circuit comprehension' system analyzes schematics to extract context like impedance and signal types, allowing the AI to apply specific physics constraints rather than relying on manual heuristic rules.
“We have this system that we call circuit comprehension, where we attempt to identify what is effectively happening on all the pins on your board. Right? And this is fundamentally where our biggest kind of work on limitations are, is like, there's things we can understand today and there's things that we can't…”
Sergiy Nesterenko · Hear it at 31:11
Engineering & simulationQuilter
Quilter generates multiple layout candidates with varying layer counts and trace spacing, grading them against physics checks to provide engineers with optimized options for review.
“Then you pass that off into the reinforcement learning system. It runs, generates a whole bunch of candidates, so and so forth, picks out the best ones, grades them, and shows them to you in a report, right?”
Sergiy Nesterenko · Hear it at 31:11
early-stage companies
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Sergiy Nesterenko, CEO of Quilter.ai, explains how his company uses generative AI and parallel cloud compute to automate PCB layout from schematics. He discusses the company's pivot from hardware sensors to software, drawing on his experience at SpaceX where manual routing became a critical path bottleneck. Nesterenko details how Quilter handles constraints, validates designs using built-in Maxwell equation solvers, and targets specific fabs like JLCPCB and Oshpark to ensure manufacturability.
Alain-Sam Cohen and Nabil Chouba of InstaDeep’s DeepPCB explain how their reinforcement-learning routing engine, paired with the natural-language orchestrator Cooper, detects design intent like net classes and impedance before routing. They demonstrate how the tool identifies missing context, such as unspecified reference planes and USB impedance mismatches, allowing the AI to flag and fix errors that classic autorouters miss. The guests argue that task-based AI, which focuses on specific optimization problems rather than generating entire designs from vague prompts, is the viable path for hardware automation. They also discuss how DeepPCB integrates with code-based PCB tools by acting as the placement and routing backend for schematic generation.
Ioannis Papamanoglou and Narayan Powderly, co-founders of atopile, explain their code-based, AI-driven approach to PCB design, arguing that hardware has lagged behind software in tooling automation. They discuss how capturing engineering intent in code allows for deterministic design and seamless integration with tools like Altium Designer and LTspice, shifting the designer's role from boilerplate tasks to system architecture. The founders highlight the importance of connecting disconnected tools to improve supply chain resilience and firmware integration, while noting that the bottleneck for AI in hardware is orchestration rather than model capability.
Zachariah Peterson, founder of Northwest Engineering Solutions and Altium's technical consultant, discusses the state of PCB design, the industry's shift toward EMC expertise, and the impact of AI tooling. He details Altium's acquisition by Renesas, the critical need for engineers to understand manufacturing constraints and stack-ups, and the risks of relying on semiconductor data sheets for EMC guidance. Peterson also shares insights from his 'Layout Review' content series, highlighting common DRC errors and the value of mentorship in a lean industry.
Narayan Powderly and Ioannis Papamanoglou, co-CEOs of atopile, discuss their command-line circuit design tool that brings software development practices to hardware engineering. They explain how their frustration with slow board development cycles at Tesla and smart bike lock projects led them to create a domain-specific language that captures design intent rather than just schematics. The guests detail how atopile integrates with KiCad for layout, leverages LLMs for rapid iteration, and aims to empower full-stack engineers by automating the drudgery of component selection and validation.
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