Hardware Podcasts

DDR Compliance Simulation in Seconds, Not Days

OnTrack · 29 Jul 2026 · 38m · Episode 349

What this episode covers

Ben Dannan, founder of Signal Edge Solutions, and Tyler Huddleston, an SI/PI engineer at the same company, discuss the challenges of high-speed DDR compliance simulation. They explain how traditional workflows using Keysight ADS Memory Designer can take days and produce false positives, then demonstrate their new tool, MEM Check Pro, which processes HDF5 waveform data to return compliance results in under a minute. The conversation also covers signal integrity issues in thick data center boards, managing loop inductance, and the importance of IBIS model quality.

Most relevant to

companies scaling up

Topics

Mentioned

Companies
Signal Edge Solutions, Northrop Grumman, Micron, Samsung, Community Electronics
Products
MEM Check Pro, Memory Designer
Tools
Keysight ADS, Infiniium Offline
Also
HDF5, JEDEC, IBIS

Related episodes from other shows

Other shows on the same ground, closest first.

  • Oxide and Friends · 1h 34m

    Bringup Lab Chronicles: A Measurement Two Years in the Making

    Oxide Computer Company electrical engineers Ariane, Eric, and Tom detail the two-year effort to bring up a 100Gb backplane link, utilizing Teledyne LeCroy VNAs and TDRs to measure signal integrity. They explain how a missing 100Ω termination resistor on the clock line caused fatal jitter, a problem solved by adding an external resistor despite datasheet warnings. The team also built a custom probing station and used ANSYS simulations to model vias and impedance, ultimately achieving a link with zero forward error correction.

    PCB design & layoutTest & measurement
    9 chapters

  • EE Times Current · 31m

    How AI is Changing Every Aspect of EDA

    Satish Kumar Balasubrahmanian, who leads product management for custom IC verification at Siemens EDA, explains how the company applies 'Verifiable AI' to accelerate semiconductor design and verification. He details the evolution from brute-force Monte Carlo simulations to AI-driven tools like Solido, which reduce simulation counts by 100x while maintaining high-sigma accuracy for mission-critical applications like automotive. Balasubrahmanian also discusses the integration of generative AI and LLMs to leverage historical design data, improve workforce training, and automate knowledge retrieval, arguing that these tools must be verifiable and robust to be production-ready.

    EDA & CAD toolsChips, FPGAs & semiconductors
    6 chapters

  • Oxide and Friends · 1h 16m

    The Return to the Chamber of Mysteries

    Bryan Cantrill and Adam Leventhal of Oxide Computer Company are joined by Robert "RFK" Keith, Dan Chirpich, and Stu Donnan to discuss the company's recent struggle with FCC EMC compliance for their next-generation rack. The team details how testing 32 AMD Turin-based Cosmo sleds in Rack Model 0.5 revealed unexpected radiated emissions at 26.562 GHz from QSFP transceiver cages. After days of failed debugging attempts involving paint masking and cable repacking, a breakthrough came from a conference talk by Dan Chirpich on finite difference time domain analysis, which suggested using absorbing materials. The team successfully mitigated the issue by die-cutting and applying these absorbers to the connectors, allowing them to pass compliance testing.

    Certification & compliancePCB design & layout
    8 chapters

  • EE Times Current · 18m

    Accelerating Complex Analog IC Design: The Power of Early Reliability Verification

    Matthew Hogan, Product Management Director at Siemens Digital Industry Software, explains how Insight Analyzer enables 'shift-left' reliability verification for complex analog and mixed-signal IC designs. He details how the tool performs topological state-based analysis on pre-layout netlists to identify leakage paths and domain crossing issues before simulation. Hogan highlights the tool's automatic circuit recognition and integration with Cadence and Siemens Custom IC environments to help designers catch subtle errors early in the flow.

    EDA & CAD toolsAnalog & power electronics
    6 chapters

  • Oxide and Friends · 1h 43m

    Integrating Hardware and Software Teams

    Jon Masters, joined by engineers from Oxide Computer Company including Nathaneal Huffman, Matt Keeter, and Timon, discusses the systemic silos between hardware and software teams and the industry's failure to integrate them. They highlight specific technical challenges such as the perishable nature of Tachyon 100G PCB prepreg material, the complexity of DDR5 training, and the reliance on proprietary EDA tools like Altium and KiCad. The group advocates for open-source hardware tooling, breakout boards like the 'gimlet' and 'dimlet', and educational resources to bridge the knowledge gap and reduce the high cost of hardware errors.

    Embedded firmwareEDA & CAD tools
    8 chapters

The summary, chapters and topics are generated from the episode’s audio by this directory, not written by OnTrack. The episode itself belongs to its publisher.