AMD Low-Power Guru Addresses the Looming Electronics Power Challenge
Sam Naffziger, AMD's Senior Vice President and Corporate Fellow, details his 30-year career in processor design, explaining how he pioneered low-power techniques like adaptive clocking and boost modes at HP and Intel before bringing them to AMD. He discusses the transition from monolithic SoCs to chiplet architectures, highlighting the Rome server processor and 3D V-Cache as key innovations that address the looming power challenge in data centers and consumer devices. Naffziger emphasizes that future performance gains require a multidisciplinary approach integrating software, packaging, and silicon design to achieve AMD's '30 by 25' efficiency goal.