The Amp Hour · 11 Jan 2021 · 1h 23m · Episode 525
Brian Faith, CEO of QuickLogic, explains how the company shifted from proprietary tools to adopting SymbiFlow as its official open-source FPGA toolchain, a decision driven by persistent engagement with Google’s Tim Ansell. He details the integration of the SensiML platform to enable low-power machine learning on devices like the EOS S3, allowing software engineers to build AI models without deep hardware expertise. Faith discusses the strategic move to license embedded FPGA IP and participate in open hardware initiatives like the Open Hardware Group and Chips Alliance to support mass customization and heterogeneous computing at the edge.
Where this conversation describes AI being used to build or deliver a product. Part of the AI in practice tracker.
Engineering & simulationSensiMLsaves approximately $500,000 in people costs for a proof of concept
SensiML's cloud-based platform takes labeled sensor data and automatically generates machine learning inference models that can be deployed on resource-constrained microcontrollers.
“that software is, is cloud-based. It takes labeled sensor data and it generates all these inferencing models that you could then run on device in a resource constrained microcontroller.”
Brian Faith · Hear it at 41:21
Engineering & simulationSensiML
SensiML allows users to capture time-series sensor data, label events like door openings, and iteratively retrain models to improve accuracy or reduce model size for edge deployment.
“if you get more data over time, let's say you go to a few different more houses, you just upload that data and it sort of retrains the model with that additional data. So perhaps it gives you a more accurate model or perhaps a smaller model because it's got more data to work with, but it's an iterative approach.”
Brian Faith · Hear it at 49:12
Engineering & simulationSensiMLgyros take like 10 times the power of an accelerometer
SensiML analyzes sensor data to determine if specific hardware components (like a gyro) are necessary for a task, enabling engineers to remove power-hungry parts without losing accuracy.
“What we found out is that the accuracy of the gesture detection didn't change if we removed the gyro from the equation. Wow. And that was, that was possible because we were able to do this in software super quick.”
Brian Faith · Hear it at 1:09:19
companies scaling up
Other shows on the same ground, closest first.
Geoff Tate, CEO of Flex Logix, explains the distinction between AI training and inference, arguing that engineers must benchmark their specific neural network models on target chips rather than relying on generic metrics like TOPS, which he demonstrates can be misleading compared to real-world performance on models like YOLO V3. Industry analyst Kevin Krewell discusses the rise of open technologies in hardware, tracing the evolution from open source software like Linux to open RAN in networking and the growing ecosystem around the open-source RISC-V architecture as an alternative to proprietary instruction sets like ARM and x86.
Hackaday editors Mike Szczys and Elliot Williams discuss the Circuit Sculpture Contest winners, including Kelly Heaton’s resistor bird and Matt Sang’s Z80 wire computer, alongside hacks like a microcontroller-corrected barn door telescope mount. The episode features an interview with the OpenFPGA team—David, Clifford Wolf, Piotr Temski, and Temezzo—at 35C3, discussing the open-source FPGA ecosystem, tools like nextpnr and icestorm, and hardware such as the iCE40, ECP5, and icebreaker. They highlight the shift toward accessible FPGA development, mentioning projects like Tomu, Fumu, and the push for supporting Xilinx 7-series via Project X-Ray.
Piotr Esden-Tempski of 1BitSquared discusses the company's role in manufacturing open-source hardware, specifically the Glasgow digital interface explorer, the iCEBreaker FPGA board, and the Black Magic Probe debugger. He explains the economic rationale for using an old Quad 4C pick-and-place machine for small-batch production and details how Glasgow uses an FPGA to dynamically generate hardware protocols via the nmigen HDL. The conversation also covers the geopolitical shift toward RISC-V in China, the challenges of debugging legacy industrial equipment, and the importance of documentation and community education in the open-source hardware ecosystem.
Narayan Powderly and Ioannis Papamanoglou, co-CEOs of atopile, discuss their command-line circuit design tool that brings software development practices to hardware engineering. They explain how their frustration with slow board development cycles at Tesla and smart bike lock projects led them to create a domain-specific language that captures design intent rather than just schematics. The guests detail how atopile integrates with KiCad for layout, leverages LLMs for rapid iteration, and aims to empower full-stack engineers by automating the drudgery of component selection and validation.
Adam Taylor, founder of Adiuvo Engineering and FPGA Horizons, explains why he considers FPGA engineering a top career choice, citing the evolution of FPGAs from simple glue logic to advanced compute platforms with AI engines. He discusses how modern FPGA tools are more accessible and how AI-driven agentic coding assistants are changing RTL development by acting as a new layer of abstraction rather than replacing engineers. Taylor also details the success of his vendor-neutral conference, FPGA Horizons, and its expansion to the US through a partnership with PCEA at PCB East, highlighting the critical need for collaboration between FPGA and PCB designers to handle high-speed signaling and complex power requirements.
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