# Leading Edge Analog with Joren Vaes

- Show: [The Amp Hour](https://hardwarepodcasts.com/podcast/the-amp-hour)
- Published: 2025-10-18
- Length: 1h 04m
- Episode: 706
- Page: https://hardwarepodcasts.com/podcast/the-amp-hour/2025-10-18-leading-edge-analog-with-joren-vaes
- Listen: https://theamphour.com/706-leading-edge-analog-with-joren-vaes/

## Summary

Joren Vaes, a high-speed design engineer at SOFICS, explains the complexities of designing analog IP blocks for leading-edge semiconductor nodes like TSMC's 2 nm process. He details how designers navigate massive Process Design Kits (PDKs) with thousands of rules, utilizing advanced simulation tools from Cadence, Synopsys, and Siemens to manage parasitics across 18+ metal layers. The conversation covers the transition from FinFET to nanosheet architectures and the use of on-chip passive components, such as transformers, to achieve impedance matching at frequencies up to 50 GHz. Vaes also describes the rigorous verification workflow, including Design Rule Checks (DRC), Layout Versus Schematic (LVS), and parasitic extraction, which are critical before tape-out to millions of dollars in mask costs.

## Chapters

- [0:00](https://hardwarepodcasts.com/podcast/the-amp-hour/2025-10-18-leading-edge-analog-with-joren-vaes#t=0) Introduction: Joren Vaes and SOFICS
- [1:35](https://hardwarepodcasts.com/podcast/the-amp-hour/2025-10-18-leading-edge-analog-with-joren-vaes#t=95) Simulation and Modeling in IC Design
- [4:07](https://hardwarepodcasts.com/podcast/the-amp-hour/2025-10-18-leading-edge-analog-with-joren-vaes#t=247) Layout, PDKs, and Design Rules
- [7:57](https://hardwarepodcasts.com/podcast/the-amp-hour/2025-10-18-leading-edge-analog-with-joren-vaes#t=477) FinFET, Nanosheets, and 2 nm Nodes
- [15:34](https://hardwarepodcasts.com/podcast/the-amp-hour/2025-10-18-leading-edge-analog-with-joren-vaes#t=934) High-Speed Interfaces and Impedance Matching
- [21:01](https://hardwarepodcasts.com/podcast/the-amp-hour/2025-10-18-leading-edge-analog-with-joren-vaes#t=1261) Millimeter Wave and Optical Physics
- [36:32](https://hardwarepodcasts.com/podcast/the-amp-hour/2025-10-18-leading-edge-analog-with-joren-vaes#t=2192) Electromigration and Process Constraints
- [50:36](https://hardwarepodcasts.com/podcast/the-amp-hour/2025-10-18-leading-edge-analog-with-joren-vaes#t=3036) The Design Flow: Schematic to Tape-Out
- [1:00:49](https://hardwarepodcasts.com/podcast/the-amp-hour/2025-10-18-leading-edge-analog-with-joren-vaes#t=3649) Test Wafers and Wafer Probing

## Topics

- [PCB design & layout](https://hardwarepodcasts.com/topic/pcb-design)
- [Chips, FPGAs & semiconductors](https://hardwarepodcasts.com/topic/chips-and-fpgas)
- [EDA & CAD tools](https://hardwarepodcasts.com/topic/eda-and-cad-tools)
- [Analog & power electronics](https://hardwarepodcasts.com/topic/analog-and-power-electronics)
- [Debugging & failure analysis](https://hardwarepodcasts.com/topic/debugging-and-failure-analysis)

## Most relevant to

early-stage companies

## Mentioned

- SOFICS (company)
- TSMC (company)
- Cadence (tool)
- Synopsys (tool)
- Siemens (company)
- Global Foundries (company)
- Intel (company)
- Samsung Foundry (company)

## Related episodes from other shows

- [The State of Analog Design in 2023](https://hardwarepodcasts.com/podcast/ee-times-current/2023-01-20-the-state-of-analog-design-in-2023) (EE Times Current)
- [Episode 67: A Conversation with Aart de Geus on EDA and the Future of Silicon Design](https://hardwarepodcasts.com/podcast/the-circuit/2024-05-13-episode-67-a-conversation-with-aart-de-geus-on-eda-and-the-future-of-silicon-des) (The Circuit)
- [Episode 38: The Future of Transistor Design and Advanced Packaging](https://hardwarepodcasts.com/podcast/the-circuit/2023-10-16-episode-38-the-future-of-transistor-design-and-advanced-packaging) (The Circuit)
- [How AI is Changing Every Aspect of EDA](https://hardwarepodcasts.com/podcast/ee-times-current/2024-09-26-how-ai-is-changing-every-aspect-of-eda) (EE Times Current)
- [Accelerating Complex Analog IC Design: The Power of Early Reliability Verification](https://hardwarepodcasts.com/podcast/ee-times-current/2025-07-28-accelerating-complex-analog-ic-design-the-power-of-early-reliability-verificatio) (EE Times Current)

## Citing this page

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