193: Axiomatically Did Not Happen

Embedded.fm · 29 Mar 2017 · 1h 10m

What this episode covers

Owen Anderson, an engineering manager at Oculus and long-time LLVM contributor, explains the architecture of compilers, focusing on the role of Intermediate Representation (IR) in enabling optimization and multi-target support. He details how LLVM uses SSA form to simplify analysis, discusses the trade-offs between RISC and VLIW instruction sets, and describes the unique batch-oriented nature of GPU architectures compared to CPUs. Anderson also shares a specific debugging story involving undefined behavior and the subtle differences between C and C++ volatile semantics, concluding with advice for students entering the field.

Mentioned

Companies
Oculus, Nvidia
Products
Jetson TX 2
Chips
RISC-V, ARM
Tools
LLVM, Clang, GCC, OpenCL
Also
Haskell

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